Research And Implementation Of FPGA On LTE-A Downlink Synchronization Technology

As the main stream of the fourth generation technology, LTE-A has always been the hot spot in the field of wireless communication. Since LTE-A uses OFDMA as its multiple access technology, and the orthoganality between the OFDM symbol carrier waves is sensitive to the timing and the frequency variance, precise timing and frequency synchronization are crucial to the LTE receiving performance. However, the communication environment is complicated and varies from time to time. In the meanwhile, the synchronization performance is real-time changing due to the mobility of the terminals. Thus, to ensure the precision of synchronization, it is of great significance to keep track of the synchronization performance and hold the base stations and the terminals in synchronism.This paper mainly researches on the LTE-A downlink synchronization technology, which includes the initial cell search and the subsequent real-time synchronization tracking. Specifically, accordding to the features and requirements of every downlink synchronization process, appropriate implementation solutions are put forward, which are designed to save logic resources as much as we can on the premise of meeting the performance requirements. The main content of this paper is described in the following:Firstly, the physical layer of LTE-A is introduced in detail, which contains the frame format of LTE-A, the principles of OFDM, the synchronization signal and the cell reference signal used in the synchronization. In the last part of this chapter, some useful concept of the wireless channel is discussed, which works as the foundation of the subsequent chapters.Secondly, the influence of the timing and frequence variance is analysed in quantity. According to the quantitative analysis requirement, the timing variance after the synchronization tracking has to be limited within 8 sample points, and the mean square error of the frequency variance can not be larger than 0.01%. Then the detection methods of PSS and SSS signals are elaborated. In the last, main synchronization algorithms applicable to LTE-A are explained and analysed in a simple way, including time and carrier synchronization.Thirdly, the cell seach solution is proposed. To be specific, the PSS signal detection uses the algorithm of local sequence correlation. Also, the channel estimation and equalization are added before the SSS signal detection, in the meanwhile the SSS signal after equalization is quantified by sign. In this way, the detection performance is improved and the resource cost is reduced. Then, the characteristics of the LTE system and the algorthm itself are combined to improve the timing tracking algorthm, which cuts down on the resource cost. Finally, Matlab simulation is carried out on the designed solution. For initial synchronization, the detection accuracy of 90% can be reached under the condition of 2dB SNR. For synchronization track, the timing synchronization accuracy of 90% or more can be aquired around-2dB SNR, and in the meanwhile the mean square error of frequency deviation is less than 0.01%.Fourthly, fixed-point simulation and RTL-level design are carried out on the proposed solution.The correctness of the circuit function is testified by the software tool Modelsim, which also realizes the synthesis and timing analysis. The results show that the resource cost and the running speed both meet the expected requirements. Then the test verification is carried out on the Virtex 6 XC6VLX240 T chip produced by the Xilinx coorporation. The test results show that the circuit design is correct and the performance can meet the expected requirement.