| Satellite communication, which has the features of wide coverage range, large communication capacity and long transmission distance etc, has a promising application prospect in modern wireless communication. Thanks to its communication capability over the existing background communication system, overlap communication has been receiving more and more attention from researchers. In this thesis, an emergency rescue communication system based on satellite overlap communication has been designed, which takes advantage of RS codes and DSSS technology. And that theoretical analysis and simulation results of the key technologies in this system are presented in detail. The main work is summarized as follows:1. According to the research and analysis results, the disadvantages of current emergency communication system are pointed out in this thesis. Meanwhile, the design scheme of this emergency rescue communication system based on satellite overlap communication is proposed.2. The fundamental principle of satellite overlap communication is introduced briefly. The application environment and requirements of this system is analyzed. Moreover, GEO satellite is selected to be the background satellite of this system.3. According to the basic requirements of the overlap communication and the satellite link budget results, it is shown that the designed system is feasible and achievable. By utilizing the above results, the structures of the transmitter and receiver of this system are determined, with the emphasis on the evaluation and verification of the system synchronization scheme.4. The encoding and decoding algorithm of RS codes is investigated. The error correcting capability and performance is analyzed. The hardware implementation of RS codes is achieved through the Quartus II software. Furthermore, the correctness of the hardware implementation is verified by comparing the hardware output results with software coding results. Then, the basic principle and related contents of direct sequence spread spectrum(DSSS) technology are studied, and its FPGA design is fulfilled. |