Research On Anti-jamming Techniques For Satellite Navigation Links

Satellite navigation systems are of great value in military application. Facing the increasingly complex spatial interference environment, the research on anti-jamming techniques for satellite navigation links is of great significance. In the traditional communication links, the current anti-jamming algorithms can achieve the ideal BER. However, they generally not consider the influence on the ranging algorithm. To meet the requirement of strict phase of carrier-phase ranging, a new implementation scheme of the anti-jamming system for satellite navigation links is put forward. It is based on the study of classical anti-jamming algorithms in time domain. This thesis presents the simulation performance of the system with the MATLAB and the hardware implement with FPGA, which shows that the new anti-jamming system can reduce the influence on the phase. The author’s major contributions are outlined as follows:1. Two kinds of classic anti-jamming technologies are analyzed, which include time domain and transform domain interference suppression. Then it is focused on the time domain adaptive filter algorithm and the implementation of filters. It points that FIRDF has a good characteristic of linear phase.2. Research on the theory of carrier-phase measurement in satellite navigation system. The carrier-phase ranging has very stringent requirements on the carrier phase, and its measuring accuracy is also high than the PN-code ranging. However it needs to solve the problem of fuzzy integral period. In addition, a detailed analysis of the principle of frequency locked loop is presented and the design method of the basic FIR filter are is also studied.3. Based on the direct sequence spread spectrum using BPSK modulation, a new anti-jamming system is put forward. Build a BPSK modulation DSSS system platform, observe the different performance of the baseband notch and the traditional notch algorithm by the example of sweep frequency interference. The phase error curve of different designs of notch filter is given, and a comparison with the theoretical value of the error rate is also presented.4 Based on software performance simulation, further implement the hardware is presented by FPGA. Then several crucial modules of the system are developed and discussed, including the up and down frequency module, frequency locked loop module, notch filter module and so on. And then the anti-jamming system is built from the bottom to the top with the Verilog HDL language. After debugging and the combined test with MATLAB, it shows that the implementation scheme of the anti-jamming system is satisfying.