Design Of Parallel Computing System For Back Projection Algorithm

The Back Projection (BP) radar imaging algorithm processes based on time domain, so it has good robustness and can adapt any carrier aircraft movements and non-uniform aperture imaging. But its arithmetic operations are proportional to the amount of the target imaging points and the number of echo pulses. When the amount of high-definition imaging applications is very large, its computing time is also very large. So how to improve the operational efficiency of the algorithm becomes a serious problem.Based on the deep analysis of the parallel characteristics of the BP algorithm, this paper proposes three parallel optimization methods from the perspective of parallelization optimization, which improve the operational efficiency of the algorithm。Then it designs a multi-core hardware and software system based on NoC architecture. Base on the FPGA experimental results, the paper presents two real-time imaging system solutions, which offer two ways for the practical application of the algorithm. To speed up the design efficiency of multi-core imaging system, the paper create C model and TLM model C++and SystemC。They provide a macro unified plan for the entire system and give a reasonable division of hardware and software. The paper can co-verify the hardware and software earlier, speed up the design progress.The paper designs the hardware and software based on the system model and NoC architecture. It designs accelerated core for the back projection which spends lots of time and has a good concurrency property. The system integrates multiple cores to improve the operational efficiency further. The system selects ARM processor as the master core of the subsystem, and designs corresponding parallel software design, to achieve high performance computing system of BP algorithm.The paper verifies the system on FPGA. As to the 8K*4K size of image, the system requires only 310 seconds to imaging, while PC spends 5 hours 23minutes, up to 65 times speedup. The experiment verifies the system’s functionality and high performance.Finally, the paper proposes two effective solutions to meet the needs of real-time imaging applications based on the experiment result of FPGA.