Energy Minimization Using Dynamic Voltage Scaling And Cache Partition In Real-Time Systems

With the growing integration of microprocessors in embedded systems, their performance has been greatly improved, but the chip’s power consumption also increases. For battery-powered embedded systems, the increasing power brings in the increasment of chips’size, shorter working or operating time, lower reliability and higher cost. Therefore, how to save energy has been an important research topic for embedded systems.DVS (the dynamic voltage scaling) strategy which is used to adjust the CPU operating frequency and voltage dynamically to reduce the systems’energy is a widely used CPU energy-saving technology. Cache Partition policy can be seen as an indirect Cache energy-saving technology which splits Cache logically for each task, and each task can only use their own part of the system Cache. Through dynamically putting the part of Cache of a task into Sleep mode, this technique can indirectly achieve energy saving. Another advantage of Cache partitioning is it can eliminate the Cache interference between tasks. In this thesis, we will propose the two approaches by combining the above two techniques to achieve a better energy-saving effect.Firstly, the establishment of a uni-processor system model with the combination of DVS and Cache partitioning technique is given. The analysis of the effect of DVS and Cache partitioning technique on the system energy consumption is also provided, according to which we propose two polynomial time complexity algorithms to minimize the system energy consumption. Then we consider the case of multi-core systems, give the corresponding systems model and modify the single-processor algorithm to minimize energy consumption for the under multi-core processors.Finally, this thesis presents the performance comparison of several algorithms. We use some simulation tools to derive the experimental data set, including the power, Cache parameters. Using the data set, the experiment compared the energy consumption of different algorithms and the optimal solutions, and the results show that the proposed algorithms for both uni-processor and multi-core systems are very close to the optimal solution. To sum up, the proposed algorithms can not only meet the systems’ timing constraints, but also reduce the system energy consumption effectively.