High-speed All-optical Binary Data Pattern Recognition Based On Semiconductor Optical Amplifier

Optical network security has been the key concern in opticalpacket-switch system. All-optical high-speed binary pattern recognitionhas drawn researchers’ attention as it plays the key role in optics firewall.Currently, all-optical pattern recognition has been achieved based oncorrelation and all-optical logic gates. Correlator-based system is relativelysimple and scable. However as the optical signal-to-noise ratio of outputsignal is not ideal, it is difficult to setup a threshold to detect the outputpulse. The system operation speed is also independent on high-speeddevices. We mainly study about all-optical high-speed binary data patternrecognition system based on all-optical logic gates. All-optical logic gatesmainly achieved based on semiconductor optical amplifier due to its highnonlinear feature and ease of integration. Although system based onall-optical logic gates has been studied deeply, it still needs research onoperation speed and new scheme.We mainly accomplished research by both simulation and experiment.Our tasks are mainly listed as follows:(1)We accomplished the simulation of all-optical high-speed binarydata pattern recognition. Firstly we simulate SOA model since theall-optical logic gates is implemented by SOAs. This model coulddramatically improve the simulation effenciency through simplifing theexisting model. Simutanously, this model takes some important physicalprocess into consideration. Therefore we could obtain the gain recoverydynamic and phase recovery dynamic similar with the real SOA.Based on this model, we simulated the all-optical high-speed binary data pattern recognition at40Gb/s. We firstly simulated the XOR gate,AND gate and regenerator. Then we simulated4-bit,8-bit,16-bit,32-bittarget pattern recognition. Output signal is optimized by preciselyadjusting the input power and delay. This scheme can recognizes anynumber of bits of target pattern with only three gates. The final result cannot only recognize, but also indicates the location of the target pattern. Atlast, the simulation results are in accordance with the previous experimentresults.(2)We studied about the high-speed optical switch in experiment tofurther improve the operation speed. We proposed integrated turbo-switchthe first time and verified the operation performance. At last, AND gate isimplemented via integrated turbo-switch at42.4Gb/s,84.8Gb/s and169.6Gb/s relatively, which could find application in higher speed system.(3)We proposed new scheme of all-optical high-speed binary datapattern recognition. The scheme compares with the data pattern withcirculated target pattern with XNOR gate in parallel. Recognition result isobtained by N times1-bit delay circulation of data pattern. This schemerequests only one logic gate, however would be difficult to analyze sincelack of analyze window. In order to overcome this limitation, we couldprovide a comparing window through AND gate. Thus could be easier toanalyze in expense of additional logic gate.