A Low Cost And Low Power Design Of UHF RFID Tag Chip

Began in the1990s, Radio frequency identification (RFID) technology is a kind ofautomatic identification technology. That means by the way of radio frequencyidentification we can identify specific goals and reading, writing or exchanging datawithout establishing mechanical or optical contact between them. With the developmentof science and technology, RFID will become more quickly identify, small size, andshape diversification. This paper mainly introduces a design of a single labelidentification technology in a closed-loop system. Based on the ISO/IEC18000-6Ccommunication protocol, we learn the advantage in the area and power consumption.In view of the supplication environment of single label in the closed-loop system,this paper presents a new design with a new set of command, new command format andnew response on the base of ISO/IEC18000-6C. We analyzed the chip area of the design.And with the help of PrimePower consumption analysis tool we summarize a summaryabout the different operations such as read a data from the label, write a data into thelabel, lock the membanks of the label and kill the label. We also analyze every modulein one operation. At last, we make a comparison to ISO/IEC18000-6C multi labels inthe open system and come to the conclusion that single label in a closed-loop systemhas obvious advantages in size and power consumption.After DC synthesis and PT static timing analysis, we completed a digital basebandphysical layout in Astro. Through the former-simulation, we verify the correctness ofdesign function. Through the post-simulation, we verify the rationality of the constraint.Through FPGA, we verify the realizability of the design. The design of single label in aclosed-loop system can realize the demand of identifing specific goals and obtaining thelabel information. Due to the significant reduction in area and power consumption, thedesign of a single label in a closed-loop system has the superiority in the application.