Visual Evoked Potential(VEP) Signal Acquisition System Base On FPGA

With the development of Electronic Information Technology, FPGAs withdesign flexibility, high integration and good performance make up for the deficiency ofcustom circuit and disadvantages of limited gate circuits of originalprogrammable devices. FPGAs have not only higher speeds than DSPs, but also shorterdesign cycle and more flexibility than ASIC. Therefore, they bring modernmedical instruments miniaturization, low power consumption and intelligentization.Evoked Potential (EP) is considered as the third greatest achievement in the fieldof electro-neurophysiology ranking after EEG and EMG, which is not only used toprognose, evaluate and assess therapeutic effect of mental disease, but also contributesto researches about personality and nature of human intelligence. Because ofsignal stabilization and little influence caused by subjects’ self-control ability, VisuallyEvoked Potential (VEP) Inspection, which provides objective basis todiagnose and distinguish visual nervous system disease and fundus lesions, is animportant part of eye examination. Pattern reversal is used as VEP stimulus in thissystem. This method is able to induce stable VEP signal with littleindividual difference,and its incubation is easy to detect and. It is regarded asreliable indicators.Then stable and reliable signal detection system, accurate data transmission andscientific signal analysing and processing are all indispensible for a well performingVEP signal acquisition system. For VEP signal amplitude is always weak andonly around several μV, which is easy to be submerged by ambient noise(e.g. power lineinterference), internal noise and other physiology signal (e.g. myoelectricity and EEG).To deal with it, sampling many times and averaging acquired original data is essential,which could enhance VEP signal and reduce noise. In order to achieve it, the startingpoint of these sampling should be as accordant as possible. Furthermore, the generationof stimulus signal and the acquisition of evoked potential should be synchronized,thereby avoiding phase difference caused by different sampling.The project designs a synchronization system to trigger and collect VEP signal.EP1K100QC208-3, which is manufactured by Altera company, is used as thecore device. Taking advantage of its abundant resources and programmability, thissystem designs VEP stimulus signal source, AD sampling control unit, SRAM control unit and data transmission control unit within one FPGA chip. The main circuitwith simple structure and complete functions show small size. Because of precisegrammar, clear structure and portability, VHDL (VHSIC Hardware DescriptionLanguage) is used to describe logic circuit in this system. Altera Quartus is used as asoftware tool to compile the design, perform timing analysis, examine RTL diagramsand configure the target device with the programmer. Sampling module adopts a12-bit,successive approximation analog-to-digital converter that could operate at the full75kHz rate, which meets the project requirement. Data gathered is stored in ahigh-performance SRAM temporarily, which is able to save data withoutrefreshing circuit regularly.After signal acquisition, all data is uploaded. Computer software based on VisualBasic6.0,which is capable of setting stimulus parameters and sampling parametersbefore the system starting work, i.e. the generation of stimulation and acquisition ofsignal, controls total system expediently. What is more, the application also reads datasent by FPGA, analyzes it, shows VEP waveforms, detects and marks N75, P100andN135. Additionally, signal and parameters can be stored in TXT format and reused if itis necessary. The data transmission between the computer and FPGA follows the USB(Universal Serial Bus) protocol. Compared to RS-232or PCI-BUS, USB with strongeranti-jamming capability could transmit data faster and more stably.The total hardware and software system is tested using SignalTap Ⅱ and a functiongenerator, and performs well. To sum up, the designed system satisfies the key standardand needs of typical VEP signal acquisition systems and has reliable use value andprospect.