Research On Low Power Technology Of Processor For Discrete Wavelet Transform

With the increase of modern life pace and working stress, cardiovascular disease has become the most fatal killer of human health. However, electrocardiograph (ECG) can help diagnosing cardiovascular disease early and slow down this trend. As wearable medical equipment becomes more and more popular, the market of portable ECG analyzer grows quickly and low power technology of ECG analysis has become a research focus. In ECG analysis area, discrete wavelet transform (DWT) is a widely used tool for its excellent characters in both time and frequency domain, hence this thesis study ECG analysis with DWT and focus on low power technology of it.In this thesis, study in low power technology is presented in two levels of algorithm and computer architecture. First, a byte-aligned difference compression algorithm is proposed to reduce the memory size need, so the power consumption of memory is reduced. Furthermore, a modified DWT algorithm is presented so that compression and decompression process together with their power can be omitted. Second, SIMD multiplication technology and fast signed integer division algorithm are used to boost the DWT calculation so that the processor can stay in low power mode longer and as a consequence reduce calculation power dissipation. Then, a SIMD multiplier implementation is introduced, which offers the ability of4×8/2×16vector or dot multiply and multiply-accumulate with cost of only little modification on normal32bit multiply. At last, a two’s complement division algorithm is used to promote performance of signed division.Combining all the innovations together,41%power consumption in memory and44%in DWT calculation is successfully reduced.