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Research And Implementation Of Decreasing Algorithm For Digital Array Radar DBF Processor

Posted on:2017-03-13Degree:MasterType:Thesis
Country:ChinaCandidate:Q ChenFull Text:PDF
GTID:2278330488462621Subject:Communication and Information System
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By using adaptive digital beamforming (ADBF) algorithms, Digital Array Radar (DAR) has such outstanding advantages as simultaneously multi-beam and adaptively interference suppression. DAR has already got a certain application in communication, radar, sonar and other fields. However, there are still some challenges in the practical applications of large-scale array, such as real-time capability, multi-interference rejection capability, robustness and so on.In this dissertation, a lot of research works have been made, including the rapidly Rank-reduced adaptive beamforming algorithm which can be used in large real-time array radar system. We finished transplantation and validation of the ADBF algorithm and jointly set up a digital array radar system. Finally we made initial debugging tests on it.The main contributions are illustrated as follows:1. I studied some adaptive beamforming algorithms for large-scale array project implement from the perspective of computational load and simultaneously multi-beam capability, like GSC, HTP, FRRMVB, and so on.2. For the problem of pattern distortion and limit of requesting not include the desired signal in the echo signal when the FRRMVB algorithm is used in large signal-to-noise environment. I put forward the new FAPIMVB algorithm based on the fast approaching the power iteration and LLEMVB algorithm based on the Locally linear embedding.Compare the computation of three algorithms and the ability to suppress interference. As the real-time demand of the project become higher, we adopt LLEMVB algorithm in the practical project at last.3. In the embedded DBF processor platform based on PowerPC. I finished the transplant of the BSP program for the system of MPC8641D chip, the simulation and verification of LLEMVB algorithm is completed in the board.4. In the DBF processor platform, many system functions throughout the digital array radar is brought up, like S-RapidIO high-speed of data interaction channel, baseband data transmission based on DMA transmission, using socket programming, the algorithm realization based on interrupt mechanism and the preparation of PC software. Finally, we preliminary complete the joint debugging tests of the entire DAR systems.
Keywords/Search Tags:Digital array radar, ADBF algorithm, Rank-reduced, Fast approaching power iteration (FAPI), Locally linear embedding (LLE), Embedded processor
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