Design Of Output Voltage Sampling Circuit For Digital Controlled Psr Flyback Converter

Due to the simple circuit structure, low cost and high efficiency, Digital controlled PSR flyback converter is widely used in chargers and adapters of portable electronic equipments. As a key module of the digital controlled PSR flyback converter, the sampling error of the output voltage sampling circuit has become an important factor affecting the accuracy of constant output voltage. This thesis is focused on the analysis and design of the output voltage sampling circuit.The accurate sampling point is found by modeling the output voltage sampling waveform. Based on the deep analysis of the sampling waveform near the accurate sampling point, a novel Quasi-point voltage squeeze sampling circuit is proposed. Compared to the conventional voltage sampling circuit, the proposed sampling circuit saves the aera and power consumption by eliminating ADC. Focused on the proposed sampling circuit, system level of Quasi-point voltage squeeze sampling circuit is designed according to the constant voltage precision of PSR flyback converter, and the simulation of the M-language sampling algorithm verified the sampling circuit. Then the digital M-language sampling algorithm is instantiated by Verilog-language, two state machine included Enable and DAC_state are designed to control the sampling algorithm, and the corresponding simulation is passed. Finally, the Quasi-point voltage squeeze sampling circuit is tested on the hardware system, and both open-loop controlled system and close-loop controlled system verify the feasibility of the proposed sampling circuit.According to the simulation and test results of the system level of the Quasi-point voltage squeeze sampling circuit, under the open-loop control, the sampling error is 10 mV, only for the 0.2% of output voltage, and the sampling track delay is 1.44ms. The sampling circuit is fully compatible with PSR flyback converter under the closed-loop control. The flyback converter can achieve constant output voltage when the input voltage is 90-220 VAC, and the constant voltage precision is as high as 0.8% at full load. The stable time of the load dynamic response is only 1.61 ms, so the flyback converter is stable and good performance. Both simulation and test results meet the requirements of design.