Fabrication And Filling Technology Of High Aspect Ratio Through Silicon Vias

With the development of MEMS devices in the direction of high integration and low power consumption, a new challenge to the traditional packaging method is presented. As an interconnection technique applied in three-dimensional high density packing, through silicon via technology is a new technology solution in three-dimensional integrated circuits, using advanced packaging technology and equipment conditions, through stack of different chips to achieve the interconnection which can greatly decrease chip interconnect wire length and parasitics effect, improve the signal transmission rate and realize the minimization of interconnect delay and power consumption. Combining internship experience in the 214 Research Institute of China Ordnance, this paper investigated the hole making and filling technology deeply and systematically. Based on a large number of experiments, through hole etching and deposition parameters were adjusted, validated and improved respectively. The main research contents of this paper are shown below:(1) Through the analysis and comparison of the principle of different processes, the use of ICP etching technology and LPCVD technology were selected in production and filling of holes, which laid the theoretical foundation for the follow-up experiments.(2) Considering the effects, acting onthe etching results, of relevant process parameters and to improve the high depth width ratio through hole etching process parameters, the high depth width ratio through hole, with upper dimensions of 14.41m, bottom dimensions of 3.31m, depth of 8.83m and depth to width ratio of more than 20:1, was realized and the through hole sidewall is smooth which is suitable for subsequent hole filling process.(3) On the basis of a large number of experiments, the relationships between polysilicon deposition rate and deposition temperature, reaction pressure and silane flow rate were studied and the optimal deposition parameters were selected, as a result the hole polysilicon void free deposition was successfully completed; according to a certain amount of tests, the average values of through holes is 25Ohms. The test results show that through interconnected pores are of good electrical characteristics.