Researches Of High-Efficiency Buck DC-DC Converter With On-Chip Inductor

In the current semiconductor industry, the technology of semiconductor is more advanced and the size of device get more and more small, as described by the Moore’s Law. In addition to the pursuit of speed, another important aspect is miniaturized:the monolithic integration. Monolithic integrated switching power supply meet the mainstream of consumer electronics industry, but also isolate the internal system from the external resonator voltage caused by the parasitic of package, which can reduce the impact from external interference on internal system. Off-chip inductors occupy a large part of the space of the PCB in the inductive switching power supply. High efficiency is also a very important parameter of switching power supply, which scholars have been pursuing and researching. Therefore, the research of high-efficiency switching power with inductor integrated becomes very attractive.A high efficiency buck DC-DC converter with integrated inductor is proposed in this dissertation. The proposed converter gets a 0.9V output voltage under the 1.8V input voltage, the switching frequency up to 50MHz, the maximum load current is 500mA, and the maximum ripple voltage of output is less than 50mV. A novel integrated package inductor is employed to achieve integrated inductor in this dissertation, which uses the parasitic inductance of Bond-wire and Lead-frame to constitute the integrated inductor. The implementation can save the chip area, but also has a high Q-value, which can improve the conversion efficiency of the converter. In addition, a dual-mode control strategy is adopted:PWM&PSM, so that the converter keep high conversion efficiency over the entire load range. In accordance with the design requirements, the design of each small module is completed, and also put forward some novel circuit modules, such as zero-crossing detection module and PSM control module. Based on SMIC 0.18μm 1-poly 6-metal mixed signal CMOS process, simulated and verified each module and the entire loop using Cadence Spectre software. The simulation results show that the designed circuit meets the design requirements. Finally, tested the proposed chip and the peak efficiency is 71%. The efficiency of converter maintain at 57% with 10mA load current.