Design Of High Performance ASK Demodulation In Implantable Super Regenerative Receiver

In recent years, with China’s new health care reform, the aging population and health care services to the extent of the deepening, implantable medical devices market size will maintain rapid growth. In the past 30 years, from the implantable cardiac pacemaker to all kinds of implantable vascular stents, etc., it has made outstanding progress. As the surper-regenerative receiver has a great gain in signal regeneration, it has a high reception sensitivity, fast start time and low power consumption. It is of great significance in the application of implantable medical devices.In this paper, the demodulation module of super regenerative receiver chip has been designed based on the SMIC 0.18-μm CMOS process. In view of the low data rate in low pass filter demodulation method and high power dissipation and high quantization noise in direct sampling method, △-∑ pulse width demodulation is used. According to additional envelope detector, charge pump, quantizer and quenching signal controller in the framework of the basic super regenerative receiver, the data transmission rate can be increased and the quantization noise can be significantly reduced, what has no significant impact on the other performance of circuit. The tradeoff of the sensitivity of the receiver, the rate of data transmission and the demodulation accuracy can be achieved by setting the frequency and the sampling rate.Cadence Spectre(?) tools are used to complete the pre-simulation, layout design and the post-simulation of the key modules and the whole system in the framework of △-∑ pulse width demodulation method. Acording to the result:in the design of △-∑ pulse width demodulation method, the power supply voltage is 1.1 V, the maximum current is 1.365 mA, the quenching signal frequency is fixed at 800 kHz. While ensuring low bit error rate, the data transmission speed can reach 100 kbps, the receiving sensitivity can reach -80 dBm, the energy efficiency can reach 15 nJ/bit, the quantization noise (jitter) is only 0.5 ns.It basically meets the requirements of the design parameters. After further optimization it can be integrated into the implanted surper-regenerative receiver chip.