Research On High Efficiency Single Phase ZVS Half Bridge Power Factor Correction Rectifier

The traditional power factor correction (PFC) topology consists of a diode bridge rectifier and a boost converter, due to its large component count in the current loop, the circuit conduction loss is high, limiting its efficiency. In order to improve the PFC efficiency, a series of bridgeless topology have been proposed. In this paper, a more detailed comparism of the bridgeless topology has been conducted, found that the half bridge PFC topology is the simplest structure. The circuit only has one device in the current loop, leading to a high efficiency.However, the voltage stress on the device is relatively high in this kind of topology. If the silicon IGBT is used in this topology, it will be hard to improve the efficiency because of its high switching loss. The silicon carbide MOSFET can give low on state resistance at a high blocking voltage while keeping a low switching loss. As a results a high efficiency can be obtained when the silicon carbide MOSFET is used in the half bridge PFC.Because the turn-off loss of the silicon carbide MOSFET is far less than the turn-on loss. In this paper, the silicon carbide MOSFET is used in a zero voltage switching mode to further reduce the switching loss. All key parameters of the circuit are calculated in detail. An 1100W prototype with high efficiency is built. Meanwhile, this paper describes the influence to the control strategy when the switching frequency is increasing. Furthermore, efficiency optimazations are carried out based on digital control strategy at high frequencies.