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Design And Research Of Three-Level High Power PWM Rectifier

Posted on:2015-01-19Degree:MasterType:Thesis
Country:ChinaCandidate:Z Y WangFull Text:PDF
GTID:2272330482457302Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
Diode-clamped three-level PWM rectifier has many advantages like small THD of current, ability of two-way energy flowing and arbitrary AC power factor, etc. The structure characteristics of diode-clamped three-level PWM rectifier ensure the power switch tube is worth only a half maximum voltage of DC bus in the steady state, which makes it has a good prospect in high-voltage transmission and distribution, frequency control for high voltage and power motor, etc.In this thesis, the neutral point clamped three-level SVPWM rectifier is studied. Diode-clamped PWM rectifier topology is analyzed in detail. Mathematical model of he three-level rectifier is established in ABC stationary coordinate system and the dq synchronous rotation coordinate system. Through the transformation of three-phase AC variables to two-phase DC variables, simplifying the design of the control system, In this thesis, the voltage and current dual closed-loop control system which based on Direct Current Control is adopted and given the specific design methods of the current inner and outer voltage.Analysis of the three-level PWM rectifier has been done in this thesis, the definition of space vector is given. The 27 space voltage vectors’distribution and the influence of different vector on neutral voltage are analyzed, derivation of the conventional three-level SVPWM algorithm, Subsequently, a practical and simplified algorithm of three-level SVPWM, in the g-h coordinate has been given under the idea of previous scholars.At the same time,the reasons and hazards for the midpoint potential imbalance are analyzed.The importance of phase-locked loop (PLL) in three-level PWM rectifier is analyzed in this thesis. The fundamental of Single Synchronous Reference Frame Software Phase Locked Loop (SSRF-SPLL) and Decoupled Double Synchronous Reference Frame Software Phase Locked Loop (DDSRF-SPLL) are also analyzed. When the three-phase power is imbalance, comparing with the SSRF-SPLL, DDSRF-SPLL has better grid adaptation.The rectifier system simulation model is built in PLECS system simulation software.The correctness of the algorithm is validated by the control algorithm simulation. This topic is based on the dual three-level converter systems. A TMS320F28335 DSP+CPLD control platform is built. Through experiment, the correctness of the control strategy can be proved, and the performance indicators of the 660V/250KW rectifier system are further improved.
Keywords/Search Tags:Three-level, high-power rectifier, SVPWM, Midpoint potential balance, phase-locked loop
PDF Full Text Request
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