Research Of Redundant Fault-tolerant Power Transducer Based On FPGA

With the Grid moving in its direction of complexity and smart, the higher performances of reliability and timeliness have been regarded for the power transducer. The power transducer plays a very indispensable role for correctly transmitting the electrical parameters and ensuring the safety and efficiency of the whole control system. A new power transducer with the fault-tolerance and self-testing function is needed for the complex Grid, which can effectively screen the fault of the complex power system made by the mistakes of detection link.The proposed power transducer will adopt a fault-tolerance method in view of the balance of the three phases of the Grid, which use each phase as the redundancy for the others. A parallel multi-channel sampling and calculating mode is designed for the parameters of each phase, and the results are compared with each other for screening the fault in order to transmit the correct parameters.This thesis use the EP4CE15F17C8 FPGA of Cyclone IV series of Altera as the control core and the hardware circuit of the phase-voltage and the phase-current detection and series communication are also designed. The procedure of the transmitting, which include synchronous AC sampling of the three-phase power, fast fourier transform(FFT), calculation of the power parameters and fault-tolerance method, has been complete by Verilog Hardware Description Language(HDL) in the software platform of QuartusII 11.0. The reliability of fault-tolerance method has been analyzed mathematically. The performance simulation has been done in the platform of Modulesim and Matlab and the experiments have been done by the hardware system. The results of the simulation and the experiment can verify and validate the reliability and timeliness of the proposed power transducer.