Research On Redundancy Management Technique Of Dissimilar Platform Management Computer

Embedded computer occupies core status in the system such as aerospace system, required for high reliability, and its tiny failure can lead to disastrous consequences. Therefore, the research on high reliable fault tolerant computer has been received special attention, and an important way to enhance the reliability of fault tolerant computer is developing redundant technique.The goal of the project is to study highly reliable platform management computer and build reasonable ―fault-security‖ strategy to improve the reliability of management computer. First, the conventional self-monitoring dual redundancy computer and TMR computer is improved to design a dissimilar dual redundancy platform management computer. Each central control module uses two different processors. Increasing Cross Channel Date Link between two central control modules is to achieve the information interaction between four processors. Central control modules cross control function modules through a dual redundant 2I C bus.A set of redundant management strategy need to be formulated in advance according to the characteristics of the platform management computer. First, processor redundancy management strategy is put forward to define the priority order and voting policy of four processors, moreover, several typical failure modes appearing in the actual work is carried out detailed analysis and discussion. Secondly, synchronization strategy is put forward and task synchronization strategy has been introduced in detail according to the characteristics of dissimilar structure. Finally, based on the structural feature of double redundant bus, function module redundancy management strategy is introduced.Based on task synchronization and redundancy management strat egy, the system is designed by using the combined method of software and hardware. FPGA system design and software design of the four processors is exactly the same, and the FPGA design of veneer has been introduced in detail. According to the functions, the FPGA is divided into several modules, combined with the software, to implement the task synchronization, data exchange, fault judgment, relegation and cross control of I/O module.To verify the correctness of the synchronization strategy and redundancy management policy, principle prototype is to be tested in terms of synchronization accuracy, the commissioning results under several typical faults, and dual redundant bus switching effect. The results show that the system can work stably and the four processors which are synchronous well, can still work after two failures and be safe after three failures.