Research On Software Phase-locked-loop Technique Of Three-phase Grid-connected Inverter

With the progress of science and technology, the performance of various types of control chip is constantly improved, the software phase-locked method which can not be achieved in the past because of the memory resources and fast is into a reality step by step. At the same time, the development of grid connected inverter, power electronic devices with more variable precision, harsh conditions, which put forward the higher request to the phase lock technique. Thus,it has become essential proposing a better performance of phase-locked loop technology.First of all, through the introducing of the development of present situation of phase-locked loopleads to the theme of this paper thought-- software phase-locked loop.It studies the current three commonly used software phase-locked loop in-depth,that is Single Synchronous Reference Frame for Software Phase Locked Loop 、 Decoupled Double Synchronous Reference Frame SPLL and Double Second-Order Generalized Integrator SPLL. It deduces the theory and mathematical models of them, and also the control block diagram of the structure, and thus describes the advantages and disadvantages of them. According to the problem that there is large error when DSOGI-SPLL with DC offset,it presents a new method of phase locked based on the original DSOGI-SPLL unit, by adding an integral part in the foundation of the original unit,which can remove and extract the DC offset effectively, thereby eliminating the effects of DC offset on the system lock.Meanwhile, this new phase-locked structure can avoid superposition of the frequency error, and improve the accuracy of phase-locked effectively.It builts a hardware experiment platform based on TMS320F28335,and introduces the platform hardware configuration, writes software programs in CCS,dose experiment with those four methods when the situation is imbalance or has DC offset distortion, gets the experimental waveforms and analyzes them in detail at last.