The Design Of An Adaptive Voltage Scaling Circuits Based On Dual-loop Controll

As the sharp increase in the number of devices per unit area, and the constant increase of processor’s clock frequency, lower power consumption of processors becomes imminent to IC desginers. Adaptive Voltage Scaling(AVS) technology is a new and effective power management technology proposed in recently years, and attracted more intrests for power management researcher. It can be based on different workloads, manufacturing process and ambient temperature adaptive adjuste the power converter’s output voltage, making the energy consumed minial when accomplish a same task. This technology can reduce the power consumption of load by 30%-70%.Based on the brief introduction of research background and significance, the methods to reduce the power consumption, such as DPM strategy, DVS and AVS technology, accompany with its technical principles and developments was explained. Contrast to DPM strategy, AVS technology is powered by reducing the operating voltage of the load rather than shut down; contrast to DVS technology, AVS is a closed voltage scaling loop by detecting the load work status, rather than a open loop which through voltage-lookup table to adjust the load operating voltage. Under the analysis of three existed ways of realizing the AVS system: based on error rate of load, using fully digital DC-DC and based on delayline detection, we design a new AVS system which based on dual-loop control. By using delayline detection and statistics to judge whether the voltage just adaptive to the process、tempareture and satisfy the load works needes or not. This circuit is tape-out under 0.13?m standard CMOS process.Firstly, based on the system block diagram, each module’s function is detailed descripted, meanwhile the start and the frequency-voltage regulating. Besides, the stability of the system is analyzed from the intuitive. Secondly, the paper describes the works status、circuit realization and simulation results of initial value set up module、delayline detection module、correction algorithm module and a high speed comparator in current limitation module. The overall circuit design, function simulation, drawing layout and the package scheme is demonstrated at the end.The input voltage range of designed system is 2.7-4.2V. The load works at the frequency of 30MHz-120 MHz, and the corresponding output voltage range is 0.7-1.5V. The analog loop circuit of designed system using PWM(Pulse Width Modulation) based on the BUCK converter. Accompanied with the delayline detection and digital assistant circuits, this voltage converter outputs a low ripple voltage, and adaptive to the changes of process、temparature and load works needs. Compared with the DVS technology, the designed circuits can save as much as 46.3% energy consumption.