Model-based Automatic Analysis Of Interoperability Testing In CTCS-3Train Control System

ABSTRACT:In order to ensure the operational cross-line capability of train controlling system, the Ministry of Railways organizes interoperability work. Interoperability testing is the premise and foundation of interoperability work which is achieved by CTCS-3China train control system. Railways Ministry and C3research group analyzed interoperability testing results, identified the factor influenced interoperability, discussed solutions to achieve interoperability of devices from different vendors. We can see that it is important to ensure the accuracy of interconnection testing results.There are several issues for the current interoperability testing train control system.1) The functions and devices of train control system are complicated. This requires not only the devices to be upgraded, but also the workers excellent professional skills.2) The volume of test record data is huge and the data structure is complicated. Artificial analysis will result in poor performance.3) The inaccurate test result caused by negligence of the tester. In interoperability tests, on-board equipment and ground equipment are tested separately. This thesis studies an automatic analysis method for interoperability testing to solve the issues stated above through the interoperability testing case operated by third party on-board labs.The interoperability testing concern is the data interaction between ground and vehicles. This thesis focuses on the communication between on-board device and RBC wireless message and analyzes the testing results. The communication between vehicle and ground can be seen as state transition of the system. We got the data according to testing results. Therefore, this thesis started from the test sequence, set up a complete on-board equipment model based on testing sequences.In this thesis, we adopted time automatic machine model and added each state and state migration situation into the established model. In the actual testing process, there must be a matched access path for testing execution path in the model. So we can find this path though state reachable analysis method, analyze the state point and state migration information to find out the reason to cause the system failure during the testing process. At the same time, we realize automatic analysis of testing result according to principle of automatic generated path.In this thesis, we established on-board device model with t Timed automata model method, analyzed the XML file and actual testing record data to find the matching path in time automatic machine. Besides, we introduced the way to establish on-board device model based on testing sequence, achieve the matching path and automatically analyze the testing results.