Design And Implementation Of FPGA Sweep Signal Generator Based On

Frequency sweep signal generator is an important part of modern electronic system in our daily life and we need use it in many occasions, it can be used as a source of many areas.Frequency sweep signal generator is a key technology of frequency synthesis technology.Frequency synthesis technology,as a kind of fully digital way to realize the Direct Digital Frequency Synthesis Technology. DDS can be regarded as a technology revolution in the field of synthesis technology. It has many incomparable superiority when compared with some traditional frequency synthesis technology,such as high frequency resolution, continuous phase change, frequency conversion speed, etc. This makes that the DDS have been applicationed in various industry fields such as communication, radar, navigation, electronic countermeasure, etc.This article take advantage of the development platform of FPGA, based on VHDL Language produce sine/cosine frequency sweep signal source and the frequency sweep signal source has good reconfigurable, easy to carry, integration and better scalability based on the development platform of FPGA. The frequency value of the signal generator designed in this paper can be set up, so it has good flexibility.It can produce a variety of signal waveform as long as added some modules appropriately. Produced by the signal frequency in1MHZ～within20MHZ, the frequencies used in multiple areas, such as the Marine communication, AM radio, middle distance navigation etc.This makes the signal has a certain practical applications. it includs frequency control word register, phase accumulator, sine/cosine ROM table and other parts, mainly digital to analog conversion circuit and peripheral circuit.At the same time, the research and discusses some of the pitfalls of DDS, and aimed at these defects and puts forward some corresponding improvement measures.Aiming at the problem of DDS stray, for example, several kinds of suppression method is proposed.The last System integration are given with the Nios Ⅱ processor SOPC, complete frequency sweep signal generator of the overall performance of the test.