The Design Of HDR Camera Based On FPGA

The dynamic range of luminance in a real-word scene can be1014, and humanvision system can observe the scene whose dynamic range is105. However, in mostcases our camera can only capturethe scene whose dynamic range is about102~103. Thenormal monitors do have the same problem. For this reason, it is hard to record andreproduce the scene accurately when in the high dynamic case. So, the HDR imagingtechnology has been proposed to solve this problem. With HDR, we can reproduce thescene on a picture with both bright and dark specifics.This paper aims to propose a digital camera architecture based on FPGA, whichintegrates the function of ISP and HDR tonemapping.Firstly, this paper describes the structure of digital camera. Taking AR0331CMOS as an example, introduces the main performance of CMOS and how to use it.This paper also gives a detail description about the ISP-the key part of the camera.Secondly, this paper elaborates the global tonemapping operator of HALEQ, shares itsprinciple and gives its application method. When apply the HALEQ to local areas, animportant thing is how to solve the boundary artifacts. This paper introduces a newmethod to improve the effect based on the original method. And in order to implementthe algorithm into FPGA, we do some reasonable simplification for HALEQ.Finally, the paper proposes a SOC architecutue which is used for video processingon FPGA. Consider both ISP and HALEQ tonemapping, this paper presents the designdiagram of each modue. Take all these modules together, we can get a HDR camera.