An Explicit Analytical Model To The Grain Boundary Barrier In Undoped Polycrystalline Semiconductor TFTs

This paper proposed an analytical solution to the grain boundary (GB) potentialbarrier height (ψB) for undoped polycrystalline semiconductor thin-film transistors (TFTs).Firstly, a physical-based explicit analytical solution to the GB potential barrier height(ψB) is successfully developed for undoped polycrystalline semiconductor TFTs. Theanalytical solution is based on discrete grain analysis and U-shaped distribution of densityof states (DOS) for GB traps. The explicit solution is derived by using the Lambert Wfunction, without additional approximations introduced. The validity and accuracy of thesolution is demonstrated by comparing the model with both numerical calculations andexperimental ψBdata of polycrystalline Si TFTs. Based on careful analysis of the physicalparameters, it reveals a clear influence of physical parameters on the ψBand brings a moreprofound understanding that GB barrier play an important role in carrier transport process.Furthermore, it is found that a previous widely used Seto’s model could be consistentto the proposed model in the above-threshold region, in the case deep states DOSdominates ψB, where the mono-energetic trap density of Seto’s model roughly correspondsto the deep states DOS multiplying by3-4units of the thermal energy kT.Finally, the analytical model applied in ZnO TFTs and some discussions is obtained.