P-code Direct Acquisition Algorithm Research And Implementation Of Key Technology

With the rapid development of GNSS (Global Navigation Satellite System), satellitenavigation system by the unprecedented attention, satellite navigation receiver is widelyused. The satellite signal is using two kinds of pseudo-random code sequence, which areC/A-code used for standard positioning service and P code applied to precise positioningservice. How to realize the rapid and accurate to acquisition the P-code is a very difficulttask. The main research is as follows.This paper described the principle of spread spectrum communication system and theP-code generation and auto-correlation and cross-correlation characteristics. The paperanalyses principles which include information receive and send and acquisition of directsequence spread spectrum communication system.At present,: the FFT algorithm based on the direct average capture, the FFT algorithmbased on the overlap average capture, P code direct acquisition algorithm based onaverage method combining XFAST are used to the capture. Above three methods isanalyzed and put forward the improved P-code direct acquisition algorithm--P-code directacquisition based on average block zero padding and FFT. The amount of calculation isreduced by direct average method. Using piecewise overlapping zero make continuouscoherent integration decompose into a common cyclic correlation. Cache the FFT result ofthe received code and local codes. FFT results circumference shift instead of the Dopplershift search. Doppler shift searching with the circumference shift coming from FFT resultscan improves the data utilization rate. The improved algorithm is analyzed in detail.This paper detailed description the algorithm of the core sub-module functions andspecific implementation plan on the FPGA. The system is divided into the state machineand logic control module, sampling controller module, local code generation module, acyclic shift address generation module, module square summation and peak detectionmodule, FFT module and DDR2SDRAM IP-core cache module. First, each sub modulesis designed and verified, and then,top timing is designed, at last, P-code direct acquisitionfunction is realize and verification.