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Research On Scheduling Algorithm For Reconfigurable Embedded System

Posted on:2014-05-04Degree:MasterType:Thesis
Country:ChinaCandidate:F WangFull Text:PDF
GTID:2268330425980515Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
The rapid development of electronic manufacturing technology makeselectronic products are becoming popular in thousands of households,at the sametime, people have put forward higher request to the function demand, electronicproducts,power consumption and volume etc., this makes FPGA as therepresentative of the reconfigurable hardware has been rapid development,especially the dynamic reconfigurable technique has been widely used in FPGA,alot of people based on the FPGA scheduling algorithm is proposed and a series ofreconfigurable system, the purpose is to let the limited hardware resources can beoptimized and use the largest, the design and Realization of the system moreflexible and flexibility.Reconfigurable hardware is the foundation to build the multitask system,these tasks can be classified according to different requirements and applicationof different hardware resources to build the hardware circuit of different.Taskusually use a directed acyclic graph, task graph is performed by the embeddedprocessor, and the processors, dense and heavy computational load will greatlyreduce the efficiency of the system implementation.Aiming at this problem, thispaper proposes a reconfigurable hardware resource scheduler, and at the sametime, the prefetching, reuse and replacement technology and hardware schedulercombination, can get better results than using software method, and performthese calculations only need a few clock cycles.In the scheduler hardwareenvironment and in the design process, to extract some useful information of thetask graph, in these information by running time phases we can obtain nearoptimal scheduling results,which avoids the local optimal,but these needcalculations.In addition,the hardware scheduler device was improved, also isthrough the delay introduced several clock cycles to the exclusion of the localoptimal results.The experimental results show that, in the run time stage uses the hardware scheduler has better results than using ASAP technology.In addition,the replacement strategy is also an ideal result is obtained in the reuse andreconfigurable resource aspects.
Keywords/Search Tags:reconfigurable system, scheduling algorithm, task diagram, FPGA
PDF Full Text Request
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