High Power Factor Primary-side Feedback LED Driver For Single Stage Flyback Application

LED lighting is getting more and more share in traditional lighting market. For resident LED lighting application, amounts of international standards limit its power factor and total harmonic distortion (THD) to avoid damaging the power grid, typically, IEC61000-3-2Class C and the lighting part in Energy star program. Power factor correction (PFC) is a constraint for LED lighting system. The main lighting system with PFC contains two stages, one stage achieves high PF, the other acts as DC-DC converter to output constant current. Such systems need two separate control loops and the cost is high. Recently, single stage systems with PFC are getting more and more popular in low cost applications. Single stage systems merge two control loop into single one.Primary-side feedback is a feedback technology to detect output electrical information with primary side or auxiliary winding. Higher reliability and lower system cost can be achieved for the reduction of opto-coupler.Chip power supply can also be provided and great power dissipation on the startup resistor is saved.The focus of this thesis is to design a single-stage resident LED lighting controller with high power factor. The system adapts to wide input line voltage and the topology is flyback with primary-side feedback. High power factor and tight current regulation can be achieved without the using of high-voltage electrolytic capacitor, which greatly reduced system cost and enhanced system reliability. The controller operates in constant off-time mode, and the control loop compensation can be simplified. The controller is designed with0.5um60V BCD process, which is provided by CSMC corp. The system takes7high brightness LEDs in series as load. The simulation result shows±5%current accuracy can be achieved and PF is higher than0.9and THD is lower than20%. Test interface is also designed for ATE test to meet key issues test with the least inputs and save test cost before IC is released to market. The layout design has been finished and SOP8is the preferred package for this chip. The chip is waiting to be tapout.