Font Size: a A A

Hardware Architecture And FPGA Verification Of Video Enhancement In Harsh Environment

Posted on:2015-02-01Degree:MasterType:Thesis
Country:ChinaCandidate:X M SunFull Text:PDF
GTID:2268330425493568Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
An improved algorithm is proposed for single image haze removing using dark channel prior to avoid the low efficiency of the classical algorithm and color distortion of hazing removing in bright area. The proposed algorithm is reflected in the following two aspects. One is the spatial adaptability of atmospheric transmittance estimation by the introduction of blocking idea. The other is that the bright area can be contained by the absolute value of the difference of atmospheric light and dark channel. Compared with the classic algorithm, the time complexity of the algorithm is decreased and the weakness of transmission in the bright area is remedied. By analyzing the relationship between the low lighting image and haze image, there is a certain similarity between the inverted low lighting image and haze image,we achieve the visibility enhancement both of low lighting image and haze image. After verifying the validity of the algorithm, we design the hardware architecture, namely RTL design and vivificate the hardware architecture on FPGA. Experimental results show that the hardware architecture is efficient and feasible.
Keywords/Search Tags:haze removal, dark channel prior, visibility enhancement of low light image, hardware architecture, FPGAverification
PDF Full Text Request
Related items