| With the development of wireless communications technologies such as satelite,navigation, spaceflight test control and so forth, the technologies of Doppler FrequencyShift(DFS) reduction in aerospace telemetry have drawn much attention of experts in recentyears since the high-dynamic radial motion of transceivers generates DFS. Now the mostcommon code and modulation of communications mode is PCM/FM. It has been widelyapplied in missiles and spacecrafts, which presents a high accuracy and have a flexible form oftelemetry.Compared with simulation technology, digital technology is more stable and flexible. Inthis paper, all digital frequency synthesis technology is used to achieve PCM/FM, andintermediate-frequency signal is demodulate by researching and processing Intermediatefrequency signal at the receiver based on the software radio. DFS will have a big impact on thereceiver in the wireless transmission environment, so this paper focuses on PCM/FM AllDigital Receiver and proposes a slip amplitude detection algorithm to reduce the DFS on thebasis of receiver demodulaion.The main contents of the paper are as follows:First, the characteristics of PCM/FM on the domain of telemetry are analyzed. It mainlyintroduces both the algorithms of full digital implementation of PCM/FM modulationtechniques and the non-coherent demodulation at the receiver. And perform the simulation ofPCM/FM modulation communication system in theory.Second, in order to enhance DFS suppression ability, the receiving end of PCM/FM hasbeen improved from the angle of effect on the receiving end by carrier frequency offset. Sothis paper presents an algorithm which is easy to improve DFS suppression ability inengineering practice. Then perform the simulation of PCM/FM modulation communicationsystems which has been improved in theory.Then, to verify the main features of PCM/FM and to explore this engineeringimplementation, a hardware platform of PCM/FM modulation communication system which isbased on FPGA has been build. Similarly, a program of hardware realization has been build.Finally, by using Verilog HDL as design language, programmes of each module are compiled and debugged on an FPGA programmable board. And from the view of hardware,this article has proved the feasibility and effectiveness of this communication system. |
