The Research And Implementation Of The Layout Digital Watermark Based On The Fingerprint And Redundant Routing

The advances in semiconductor manufacturing technology make it possible in theintegration of a large number of transistors on a chip. These transistors compose ahigh-performance on-chip system. Although the IP reuse reduce the design cycle (TAT)and cost of the SOC effectively, whereas the security risks are exposed gradually.Therefore, the intellectual property protection (IPP) technology has attracted theattention of the people.In recent years, the digital watermarking technology has become an effectivemethod of the IPP. Viewing form the international research works of the chip digitalwatermarking, the integrated circuit chip digital watermark technology has beeninvestigated exploringly on various abstraction levels in circuit design and some initialresults have been obtained. However, there are many technical difficulties in theapplication of digital watermark technology to a special project.Based on the integratedcircuit layout placement and routing technology, a chip digital watermark insertion andextraction algorithm has been lucubrated in this paper, and a new solution in theprotection of the chip copyright is put forward which is named digital watermarkingmethod based on fingerprints and redundant wiring layout. The contents in the papercan be generalized as follows:Several typical placement and routing characteristics of integrated circuit hasbeen analyzed and a digital watermarking method of layout is proposed basedon fingerprint and redundant wiring.A watermark embedding algorithm based on fingerprints and redundant wiringlayout has been investigated and realized.A watermark extraction algorithm based on fingerprints and redundant wiringlayout has been studied and achievedThe layout watermarking method proposed in the paper contains the watermarkgeneration technology, the watermark embedding technology and the watermarkextraction technology. In the watermark generation process, a RSA algorithm has beenmainly adopted in encrypting copyright information on the being embedded watermark,which increases the invisibility of the watermark. The process embedding thewatermark to the layout is named watermark embedding. Based on the fingerprintencoding and redundant routing algorithm, the watermark is embedded into the selectedcarrier layer in the chip physical design stage successfully by the layout routing toolsand scripting languages in the paper.The watermark extraction is the progress in finding and extracting the watermarkcarrier line from the chip anatomy photo, which is a difficulty in the watermarktechnology. Through the correlation algorithm and consistency comparison principle between the GDS photos and camera photos, the watermark carrier line can bepositioned, then the being confirmed watermark information can be extracted andcombined form the watermark carrier line by the region growing segmentationalgorithm in the image procession. Finally, the original watermark can be obtained bydeciphering and verifying the quarantine watermark by the RSA public key generated inthe watermark manufacture processThe paper analyzes the reliability, high-efficiency and the impact on chipperformance of the layout watermarking method based on the fingerprint and redundantwiring in the experiments. The results show that the layout digital watermarking methodbased on fingerprints and redundant wiring can successfully embed the copyrightwatermark information into the layout, and can accurately extract the watermarkinformation from the anatomical photo and there is almost no effect on chipperformance, nor an additional area cost. It can be concluded that the layoutwatermarking method based on the fingerprint and redundant wiring is a high reliabilityand low cost method for watermarking.