Reserch And Implementation On Key Technologies Of64QAM Modulation And Demodulation

How to achieve efficient and reliable data transmission is a consistent pursuit ofmodern modulation and demodulation technology. Owing to its high spectrumutilization and anti-noise performace, quadrature amplitude modulation (QAM)becomes a international studying focus. This paper researches on QAM modulation anddemodulation algorithm and their implemention, using matlab and verilog language tosimulate.The second chapter of the paper introduces MQAM modulator design. LEEerror-correcting encoding and decoding has the characteristic of phase transpancy andlow redundancy, used in MQAM modulation and demodulation system a lot. Whetherthere is phase ambigulity or not, LEE code can correct error. Simulation result alsoshows that bit error gain is about2dB when LEE error-correcting coding used.The third chapter of the paper focuses on symbol synchronization. Symbolsynchronization based on Gardner algorithm uses loop feedback circuit. In this chapter,principles and algorithms about it are described firstly. Then the parameters andperformance of the loop filter are discussed by doing arithmetic design and matlabsimulation. It proves that timing jitter and convergence are contradictory. Simulationresult also shows that bit error gain is about1dB when used0.0001loop bandwidth.The forth chapter of the paper involves in blind equalization. Firstly, the circuitorganization and software algorithms to implement it are illustrated in detail, whichproves that a double mode algorithm called MMA+HCMA is more fitable.Multi-Modulus Algorithm does the equalization on both the real and imaginary part ofthe received signal to avoid the blind phase which is caused by the CMA+HCMAalgorithm. Compared with MMA algorithm, bit error gain is about2.5dB ifMMA+HCMA algorithm used.The fifth chapter of the paper mainly introduces circuit design and VerilogHDLsimulation based on theory mentioned above. A realization method adapting to FPGA ofLEE error-correcting encoding is used in this article. This thesis describes idea ofprogram design, circuit structure and Modsim simulation results. Simulation result also shows that bit error loss is about0.5dB when Verilog fixed-point simulation used.