| In order toaccelerateprocessing speed of the digital communication receiver, aparallel all-digital receiving structure named as APRX is studied comprehensively inthis thesis. Three essential demodulation techniques, parallelsymbol synchronizationalgorithm (PSSA),parallel carrierrecovery algorithm (PCRA) andparallelequalizationalgorithm (PEA), are discussed.The mathematical theories of the APRX, including the use ofoverlapping/retention to achieve linear convolution operation by with circularconvolution and the implementation of the match filtering operation in frequencydomain, are described. Then, thePSSA for APRXis analyzed. This PSSA is based onthe traditionalserial symbol synchronization algorithm in time domain, and maps theserial sample processing in time domain to the parallel block processing in frequencydomain. The three elemental operations of the PSSA are parallel O&M timing errorextracting, parallel loop filtering and parallel phase compensating in frequency domain.These three operations constitute a closed feedback loop to carry out timing errorextracting and phase compensation. With the same conception as PSSA, the PCRA iscomposed by parallel phase error detector, parallel loop filter and parallel NCO. PCRAhas similar closed loop structure and implements frequency tracking and retrieve infrequency domain. Based on the traditional Constant ModulusAlgorithm in timedomain, a parallel frequency domain equalization algorithm is given and discussed.The adaptive equalizer coefficient is updated by the calculating ofthe gradient of thecost function for each frequency component. Then, the group delay is eliminated byphase rotation for each frequency component in frequency domain.Simulation results for corresponding algorithm in terms of BER and convergencespeed are given and compared to traditional serial algorithm in this thesis. Thesesimulation results show that the APRX is viable and has some superiority over serialstructure. |