The Research And Design Of Vehicle Collision Avoidance System Based On FGPGA

With the development of the national economy, the living standard of residents gradually improved, the car went into the family of the people, frequent accidents on the roads have become the social ills. Safety Driving Assist (SDA) then becomes an important content of the current international intelligent traffic system, and it is one of the main solution of the traffic safety.In recent years, with the development of large scale integrated circuit, the resources of internal storage and logic unit blocks which is contained by programmable logic FPGA, is increasingly rich. And the functions of them are more and more powerful. Therefore FPGA is widely applied to current embedded real-time system. Meanwhile with its powerful ability in parallel data processing and flexibility in designing, FPGA has great advantage in image processing. In consideration of above and the fact of high proportion of in traffic accident, this article proposes a design scheme of automobile collision system basing on FPGA and digital image processing technology as main method.This system mainly uses the digital image processing technology to perform each functional module. The system is mainly divided in to image processing module and system flow control and warning identification module. The image processing module mainly completes image information collection, pretreatment, gray processing, filtering de-noising and some other processes. Realized by FPGA in form of hardware circuit, the module fully takes the advantage of FPGA in parallel processing and suitability for pipeline, and adopt Verilog HDL to finish its design, which also make its design flexible and convenient to debug. System flow control and warning identification module is performed by Nois Ⅱ soft processor embedded in FPGA in form of software in order to complete the function of linear testing based on system flow control and warning state identification, etc. Meanwhile it takes the advantage of capacity of configuration, overloading and convenience in software flow control.The adoption of SOPC technology based on FPGA takes full advantage of the co-design of software and hardware; it utilizes hardware to perform the image processing task which has large computation and pipeline to improve the real-time of system; it utilizes software to complete the warning identification and system flow control; and take advantage of software in process control to make the operation system more flexible and make the control more convenient. Among the forms of designing hardware and software system, the adoption of the hardware description language Verilog HDL is the Software Implementation of the hardware design, which enhance the flexibility of the hardware design and the its efficiency. And the custom instruction, custom module and C2H supported by soft-core processor NIOS Ⅱ can accomplish software’s hardware acceleration, which, consequently, can achieve good balance between the system real-time and hardware cost in order to meet the customers’practical needs.This paper made a theory validation of system scheme and completed the designing and debugging of system in laboratory. After system testing, it indicates that scheme is feasible, technical advancement, and achieved the expected results.