Design And Fpga Implementation Of System On Three-phase Grid-Connected PV System

As a clear and renewable energy, photovoltaic power generation is sought after by global energy industries. The research in this article focuses on photovoltaic grid-connected inverter which is an important equipent to convert solar energy into AC power. DSP refers to a micorprocessor with a special structure, which contorl IGBT efficiently by a dedicated hardware multipler, pipeline structure, abundant resources and a dedicated PWM module. As a hardware circuit structure, the FPGA is difficult to achieve a large algorithm. But the three-phase locked loop, MPPT and AD controller which have complex logic show the significant advantages of FPGA hardware cricuit in logic control and timing control. These features make FPGA a perfect complimentation to DSP. To ensure the quality of generate electricity, DSP need to complete a lot of harmonic suppression. So this paper designed a FPGA+DSP control system which achieve the three-phase lock loop and MPPT with FPGA, as a consequence of saving much program space. DSP, as the master controller, processes control system, and FPGA, as the coprocessor, completes the algorithm of the three-phase locked loop and MPPT in phovoltaic inverter. Another fellow in our core team is in charge of the IGBT control supported by DSP processer. The thesis completed the work as follows:1. Fistly, the article introduces the background and the development of photovoltaic inverter topics, futhermore the development of comparative in recent years at home and abroad;2. This paper derives its mathematics expression type and the model in (α,β) two-phase still coordinate system and (d,q) rotating coordinate system in result of getting the phase difference signal. Then we also analyse the mathematics expression type and the model of PI controler and VCO;3. The research shows the derivation of the improved formula disturbance observational methord of MPPT by analysing the three MPPT common ways, that is the CVT, P&O and IncCond.4. Simultaneously, the design of the control configuration MCGS touch-screen is finished;5. The design schematics and PCB production of FPGA+DSP control system and data acquisition system hardware is elaborated in combination with part of the chip selection.6. The accomplishment of pipeline structure VERILOG HDL is introduced in detail, and the relevant experimental waveform and its analysis are provided in the paper. The paper also shows the outcomes from the system operating correctly. This design of FPGA+DSP control system and data acquisition system in the research completes the the function well in laboratory environment. What’s more, such a design is of great help to the scalability of the power increase in subsequent design.