| Polymer solar cells (PSC) represent a new source of renewable energy with great potential.They can be served as lightweight, flexible, conformal, and low-cost power sources for variousapplications. Despite the potential of PSCs for large-scale solar deployment, their performancemust be improved before they can be viable for commercial applications. Current best PSCsexhibit power conversion efficiencies (PCE) of8–9%in single cells and10.06%in tandem cells.To achieve the commercial threshold (>10%for single cells and>15%for tandem cells),advances in the design of new light-harvesting materials and the development of more efficientdevice processing, stable device structures and interface engineering are required. Among them,the optimization and design of the electrode buffer layer also plays a critical role in determiningthe performance of PSC devices. The appropriate electrode buffer layer can form Ohmic contactfor effective charge selectivity and extraction, which is important to further improve theefficiency and stability of PSCs.In this thesis, we focus specifically on the optimization of the electrode buffer layer of PSCs,including material selection and the simplification of device fabrication. We present a lowtemperature processed cathode buffer layer and a solution processed anode buffer layer betweenthe top electrode and active layer.Firstly, the fabrication temperature of traditional inorganic cathode buffer layer is very high,which may increase the fabricating costs and damages on the active layer. Cesium perchlorate(CsClO4) with lower evaporating temperature has been applied as the cathode buffer layer. Andthe bulk-heterojunction polymer solar cells (PSCs) have been prepared with a structure ofITO/MoO3/P3HT:PCBM/CsClO4. The evaporating temperature of CsClO4is about350°C, whichis much lower than the traditional inorganic compounds cathode buffer, such as LiF (700°C) andCsCO3(600°C). It can effectively reduce the consumption of energy and time, which alsodecreases the negative impact of high temperature on the active layer. The Power ConversionEfficiency (PCE)3.231%was obtained when the thickness of CsClO4is1nm. The efficiency isimproved by73.2%and7%for the device with a1nm CsClO4cathode buffer layer, whencompared with that of the PSC device without cathode buffer layer and1nm LiF buffer layerrespectively. This is due to evaporation of CsClO4as the cathode buffer layer can efficiently reduce the metal work function, forming Ohmic contact for effective charge extraction.Meanwhile, it can also work as a hole-blocking layer and reduce recombination of the holes incathode. Further investigation based on single carrier device and IPCE spectra test proves thecontents above.Secondly, owing to the no requirement of using low work function metal as a cathode, theinverted devices perform better stability and efficiency than the conventional PSCs. However, inthe inverted devices, the top electrode buffer layer such as MoO3and V2O5, are fabricated byvacuum evaporating. This method will consume a lot of time and energy, increase the fabricatingcosts and it is also incompatible with the whole solution process. Therefore, to solve the problemabove, a spin-coated MoO3anode interfacial layer was prepared above the active layer of aninverted PSC with a structure of ITO/ZnO/P3HT:PCBM/MoO3/Al. The fabrication technique ofthe top electrode buffer layer introduced above is vacuum-free and more compatible for allsolution processed multilayer PSC devices. The processing parameters, such as the choice of theprecursor, the hydrolysis time, the spin-coating speed, the annealing temperature and time havebeen evaluated and optimized, and the PCE of2.59%was achieved. |
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