Research And Design Of A PWM-Based DC-DC Buck Converter With A Adjustable Output

This thesis research work is from the power management chip design used in LCDTV, the author assumed BUCK-type DC-DC converter section of research and designwork. In order to meet the different LCD TVs different bias voltage requirements, thedesign of adjustable output. In order to improve the picture quality of LCD TVs, thisthesis converter is designed to achieve a good stability.This thesis includes the systematic analysis of in-depth study and research-basedPWM modulation of DC-DC converter working principle and the design requirement,based on the successful design of a good stability, output adjustable BUCK-type DC-DCconverter. In order to achieve the output voltage range of1.5V~5V regulator designrequirements, the converter reference voltage provided by the REF pin, through the choiceof the reference voltage source, realize the value of REF voltage discrete changes. In orderto meet the demand for good stability of the system, from the following three aspects ofthe study and design. Since the duty cycle is greater than50%, the inner ring may producesecondary harmonic oscillation phenomenon, and the small duty cycle will causeover-compensation problem, the converter uses a different duty cycle for different degreesof slope compensation techniques. In order to avoid the generation of high startuptransient peak current, the converter uses a slow rise of the reference voltage to generate2.5ms soft start timing, and the feedback pin FBB monitor various error conditions,controlled by the value of FBB operating frequency.System complete the Hspice simulation work by using0.5um CMOS processlibrary.The soft-start process is stable.Its conversion efficiency, the output voltage loadregulation, load regulation and other performance have reached the design requirements.