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Design And Optimization Of Digital Spectrum Analyzer Based On FPGA

Posted on:2013-04-09Degree:MasterType:Thesis
Country:ChinaCandidate:G H LiuFull Text:PDF
GTID:2252330392970088Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of wireless communication, the digital spectrumanalyzer plays a more and more important role in the spectrum observation andmonitoring. In order to meet the needs of people in all fields, all companies at homeand abroad dedicate themselves to the study of higher performance, lower price digitalspectrum analyzer. With the emergence and development of the FPGA technology,people have turned to implement the digital spectrum analyzer system based on theFPGA. However, due to various reasons, our country does not own the independentintellectual property rights in the development of high-end spectrum analyzer. As aresult, in this paper, the design and optimization of the digital spectrum analyzerbased on FPGA has the important academic and practical significance.By comparing and analyzing three kinds of structure of spectrum analyzer, in thisarticle, the way of combining super-heterodyne sweep spectrum analyzer and fulldigital intermediate frequency technology is selected to realize the spectrum analyzer.In accordance with the qualification of project, we propose the design andimplementation scheme, and carry on the detailed elaboration the scheme selection,design ideas and FPGA realization method of each key module, including theorthogonal transformation, extraction and filtering, window, FFT, sum of squares andthe accumulation and average. The spectrum analyzer system is verified to meet thedesign requirements with the MATLAB, Modelsim and FPGA co-simulation.Finally,we propose the performance optimization of the spectrum analyzer withthe Gaussian signal. This method derives a relationship among the maximum allowedinput signal amplitude, input signal power, quantization bits and optimal quantizationSNR. On the foundation, the optimal strategy of input power of ADC and clipping forthe CIC decimation filter with variable decimation rates are proposed. Both numericaland simulation results are presented to demonstrate that the proposed clipping methodis able to achieve significant SNR gain compared with the traditional rounding ortruncation method. The method has the significant reference value for optimization ofdigital signal processing beyond the digital spectrum analyzer.
Keywords/Search Tags:Digital spectrum analyzer, DDC, FPGA, Gaussian, SNR
PDF Full Text Request
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