Preferential Etching Of Void Defects In Czochralski Silicon

Void defects formed by agglomerates of vacancies are the primary grown-in defects in Czochralski (Cz) silicon, which can not only degrade gate oxide integrity (GOI) but also increase the leakage current of PN junction, degrade the insulation of the oxide and so on. These problems can seriously degrade the manufacturing yield of integrated circuits. Therefore, the void defects have been paid intensive attention in both the industrial and academic circles.Normally, the voids can be manifested as flow pattern defects (FPDs) by non-agitated Secco etching treatments, as crystal-originated particles (COPs) by the treatment in fresh SCI solution and as light scattering defects (LSTDs) by infrared (IR) light scattering. In comparison, preferential etching is a cost-effective and time efficient way to detect the defects in silicon wafers. To date, Secco etchant (0.15M K2Cr2O7:HF=1:2) has been proved to be effective for delineation of FPDs in lightly doped silicon wafers. However, the etching rates of Secco etchant at the defect sites and at the perfect crystal sites are nearly the same in heavily doped silicon wafers, thus degrading the preferential etching effect of FPDs. Therefore, it is necessary to develop new etchants for delineation of FPDs in the heavily doped silicon wafers. Up to now, direct delineation of voids by preferential etching has not been addressed. Obviously, it is of great significance for the industrial production.In this thesis, the etching characteristics of CrO3-HF(40wt%)-H2O system for heavily doped silicon wafers have been systematically investigated. In addition, by means of copper precipitation in combination with Secco etchant, the direct delineation of voids in silicon has been addressed. The main results achieved in this thesis are summarized as follows.(1) A desirable etchant, with an optimized volume ratio of V(CrO3):V(HF)=1:1and the concentration of CrO3is0.2-0.25M, for delineation of FPDs in heavily doped n-type silicon wafers has been developed. This etchant can be used to<111> or<100>-oriented heavily doped n-type Cz silicon with minimum resistivity of0.7mΩ·cm.(2) A desirable etchant, with an optimized volume ratio of V(CrO3):V(HF)=2:3and the concentration of CrO3is0.25-0.35M, for delineation of FPDs in heavily doped p-type silicon wafers has been developed. This etchant can be used to<111>or <100>-oriented heavily doped p-type Cz silicon with minimum resistivity of2.5mΩ·cm. (3) A method for direct delineation of voids in Cz silicon based on copper precipitation in combination with Secco preferential etching has been invented. The polished silicon wafers are firstly immersed into a8M Cu(NO3)2solution for a while, then they are transferred into deionized water for rinse. After drying, the silicon wafers are annealed at700-1100℃for certain time and are then taken out of the furnace for air-cooling. Such silicon wafers treated by the above-mentioned procedures are finally etched by the Secco etchant. In this way. the voids are delineated and can be observed under optical microscope. It is anticipated that this method can be applicable in the industry.