Design And Implementation Of Multi-User Coordinated Communication Systems With Beamforming

Constantly improving the reliability of point-to-point transmission and reducing interference between network users is crucial for the development of wireless communication systems. Beamforming has been widely adopted providing diversity gain by redundant transmission; coordinating multiple transmitter in order to provide higher network throughput and spectrum efficiency will also be one of the critical technologies in future systems; coordinated beamforming, combining the two sides, could provide both types of performance gain, which makes it attractive for theoretical and standardizational effort.The thesis considers two transmission setups that combine multipoint coordination and beamforming, and studies corresponding system design and hardware implementation. Firstly, the background of beamforming, interference control techniques, and coordinated transmission types differentiated in cooperation forms and coorperation depth, is introduced, with emphasis on the system model and typical algorithms of coordinated beamforming.The thesis further explores the design of fast-convergence algorithms for distributed transmit beamforming. In order to improve the low convergence rate of existing algorithms, a synchronization method is proposed by dividing the source nodes into groups and achieving intergroup synchronization. With comparable complexity to existing methods, the proposed method saves more than up to60%of total convergence time, and also maintains the distributed and linear time growth feature. A statistical model is derived to predict the convergence performance of the algorithm. Merits and defects in diverse setups are analyzed with corresponding suggestion provided on the grouping parameter.In order to design and implement multi-user MIMO detection and soft demodulation of beamformed coodinated communication receivers, the thesis considers the practical demand, which is the adaptivity to the number of users/streams and the condition of received signal. High-performance implementation-oriented algorithm is chosen after simulations and comparisons, and then mapped into hardware framework associated with FPGA chip structure. After top-level design, the specific implementation structures are described in detail for functional parts: user/stream adaptation, receive antenna adaptation and seletion and closed-loop power control mechanism. The above schemes are implemented on a high-speed Virtex-5SX95T FPGA chip. Tests and verifications show that the implementation could fulfill the designed function and performs stably well in different transmission environments.