The Desgin Of A Switch R-MOSFET-C Filter Chip

The filter structure, one of the basic module of analog integrated circuit, has been widelyapplied to the A/D converter, DSP and other electronic circuits. With the shrinking oftransistor size in CMOS process technology, it possible to use integrated resistors andcapacitors instead of active capacitance resistors to design monolithically integrated filter chip.As the capacitor resistance tends to occupy a large area in normal switch capacitor filter chip，is often produced with even greater precision with25%error in a CMOS process. The supplyvoltage that the CMOS technology can withstand is falling as the reduction in size, however,the threshold voltage of the transistor is not proportionally decrease as transistor sizes. TheMOS resistor occupies a relatively small adjustment range when switch-capitial circuitworking under a lower supply voltage. It is not so simple to get a more accurate adjustmentrange of the cut-off frequency. This thesis analysis and study the accurate adjustment of thedesign principles and a specific circuit configuration of the resistor size using the size of theduty cycle of the switching signal in detail. The cut-off frequency of the Master-Slave filter isdesigned to be automatically adjusted via a feedback loop of the circuit. The design of asuitable circuit structure makes the cutoff frequence of the Slave filter structure well followthe cutoff frequence of the Master filter structure.The basic principle of the filter structure was first analyzed in this thesis and variousparameters within the specific design criteria described. The working temperature anddesigned voltage is from-40℃to125℃and from1.6V to2.0V respectively. The work ispreformed under the0.18μm standard process library provided by Global Foundries with thehelp of Cadence’s software and Synopsys’s simulation software Hspice to simulate the circuitin Linux system. The cut-off frequency of the filter circuit is100kHz. Result shows that thesimulation indicators also meet our requirements. After the size of the circuit in various partsof the device width and length is fully determined, a brief analysis of the layout of the circuitis made and a completing the entire circuit layout has been completed and simulated.