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Performance Simulation And FPGA Implementation Of Adaptive Coding And Modulation In DVB-S2

Posted on:2013-01-20Degree:MasterType:Thesis
Country:ChinaCandidate:Y NiFull Text:PDF
GTID:2248330395967623Subject:Electronic and communication engineering
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With the rapid development of wireless communication technologies and increasing demand for wireless services, improving spectral efficiency and data rate is becoming a hotspot.Adaptive Coding and Modulation (ACM) can adaptively select a coding and modulation scheme that provides the highest spectral efficiency and data rate, while keep the transmission quality above certain threshold. The method is to use high level modulation scheme and high code rate when the channel condition is good. In the contrary, low level modulation and code rate is chosen when the channel condition is bad.In this thesis, we focused on the ACM with Low Density Parity Check Code (LDPC) and high level Amplitude Phase Shift Keying (APSK). First the basic principles and key technologies of ACM were introduced. The channel estimation method was also explained. After that, we simulated the performance of different combinations between LDPC and APSK. The combinations were compared and the thresholds were decided by the simulation results. At last, we implemented the ACM system by FPGA.In the channel coding research, first the principles of LDPC and the construction of parity matrix were introduced. Next the bit error rates of LDPC under different SNRs were simulated. As to the modulation research, the APSK was introduced and its performance simulated.The thresholds of the ACM were derived from the simulation results. The performance of ACM and none ACM schemes were compared. The results shows that ACM could significantly provide spectral efficiency.At last, the ACM system is implemented by FPGA. The frameworks of ACM scheme and implementation details were introduced. Simulation results were also described.
Keywords/Search Tags:adaptive coded modulation, low density parity check code, amplitude phase shift keying, DVB-S2, FPGA
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