Design And Implementation Of Digital Lock-in Amplifier

Lock-in amplifier is a kind of precision instrument that is used to detect and measure periodical AC signals whose magnitude are so small and weak that they are probably overwhelmed by noise sources with amplitudes of many thousands of times larger. Lock-in amplifiers utilize a technique called phase-sensitive detection to identify the measured signals whose frequency is the same as the reference signal. The signals at other frequencies rather than the reference frequency are rejected and thus have no influence on the measured results. Early researches, both at home and abroad, were mainly focused on analog LI As, but they had problems such as output offset, temperature drift, etc., which were hardly to overcome owing to the limitations of analog devices. With the development of the digital signal processors, digital LIAs using DSP chips become more and more popular. They overcome the deficiencies of the analog ones, and have the advantages of functional flexibility, high computational speed, strong handling capability, and good real-time performance, etc.In this paper, we first made a brief research background introduction on the technical principle of weak signal detections, as well as the international state-of-art study progress on LIAs. Then we emphasized on the basic operating mechanism of lock-in amplification, and analyzed the architectures of single phase and duplex phase sensitive detector from the perspectives of time domain and signal-to-noise improved ratio. In this paper, we designed a high-performance digital phase-locked amplifier system of orthogonal vector type with adjustable parameters such as sampling rate, testing time and reference frequency. The designed lock-in amplifier system employed DSP chip of model TMS320VC5502from TI Company as the hard-core digital signal processing unit, adopted Single Chip Microcomputer of type MSP430F149as the microcontroller and combined some other peripheral circuits and chips to achieve high performances. The designed lock-in amplifier system was composed of several modules such as the programmable-gain amplifying, former-stage low-pass filtering, AD sampling, data processing, systems control and upper computer, etc., and the circuit structure and working principle of each module was introduced and explained in detail in this paper. In the module of data processing, we analyzed the principles of various methods for generating reference signals and made a performance comparison among them. Based upon the theory of multi-rate signal processing technology, we designed a high-speed narrow-band low pass filter bank with a variable reduced sampling factor of D. The test showed that the pass band cutoff frequency of the designed filter could be as low as0.53Hz under a sampling rate of500KHz. The designed filter owned a very high Q value, and could meet the requirements for lock-in amplifier. We finally constructed a system test platform, and conducted measurement and analysis from many aspects such as system stability, accuracy and anti-noise performance. The test showed that the minimum relative error of the whole system could be controlled under0.1%with no addition of man-made noise. The systematic relative error could be smaller than1%when the amplitude of the added white noise is40times larger than that of the measured signal. A systematic relative below0.5%could be realized when the amplitude of the added white noise is reduced to be25times larger than that of the measured signal. A systematic relative below0.2%could be realized when the amplitude of the added white noise is reduced to be5times larger than that of the measured signal.