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The Hardware Platform Design Of Radar DBF Processor

Posted on:2011-03-15Degree:MasterType:Thesis
Country:ChinaCandidate:X D YangFull Text:PDF
GTID:2248330395462584Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
Digital beam-forming (DBF) technology derives from antenna beam-forming theory integrated with digital signal processing technology, which is widely applied to the domain of array signal processing. DBF is the most important part of a radar signal processing system. It is a method of getting spatial gain by spatial filtering. It becomes a critical technique in the development of modern radar technique.DBF arithmetic need higher transaction bandwidth, and need higher data process ability. When DBF have processor more receiver channels, system base on CPCI or VME can’t provide higher transaction bandwidth, while VPX bus which is based on new generation high serial bus solve the problem via improving the data transforming rate.Based on DBF arithmetic and VPX bus, this paper finished the systematic design of DBF processor which based on VPX bus, the general design of A/D sampling and pretreatment board, FPGA board, and PowerPC board. Finally show out the datagram analysis when implementing the hardware on DBF arithmetic. Via data analysis, the hardware platform meets the application requirements.
Keywords/Search Tags:DBF, VPX, bus
PDF Full Text Request
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