Study On The Warpage Behaviors In Package-on-Package(PoP)

Nowadays, with the high integrated electronics product like smartphone being moreand more popular, the PoP structure has become a main way to assembling logic deviceand memory device. In the continuous improvement of the production techniques ofPOP structure, people gradually realized that the most important factor to influencestacking yield loss and product reliability is the warpage in the chip, which is caused bythe thermal mismatch of different materials during the reflow process. To solve thisproblem, this paper first simplifies the typical chip structure by applying elasticmechanics plate theory and establishes the differential equation of chip thermal warpingdeformation whose analytic solution satisfies the boundary conditions. And then, thepaper makes simulation analysis on the deformation of chip structure with finiteanalysis software–ANSYS, which verifies the correctness of the analytic solution bycomparing the data of the analysis with the actual ones and the data calculated by chipdeformation warping theory.