SOPC Design On FPGA For Binocular Stereo Vision

Computational complexity and the larger amount of data access makecomputer-based approach difficult to meet the real-time requirements of the applicationbased on binocular stereo vision. This paper mainly studies how to use FPGA to designa real-time processing system for binocular stereo vision.Firstly, the paper analyzes the basic principles and key technologies of binocularstereo vision. According to the system characteristics and requirements for real-timeprocessing, a FPGA-based hardware/software co-processing solution is given. Thensubsystems required by the solution are implemented, including image acquisition,image rectification, matching and transmission of data and other key modules. Finallyall subsystems are integrated into a signal top module using Altera SOPC Builder EDAtool. The system can achieve dense depth mapping with640480pixels within128-pixel disparity search range using the window size of88or1616.The lower resource utilization and pipeline design eliminates the need of complextime constraints, which will be useful for obtaining a higher processing rate; WithCamera-Link interface specifications for image acquisition and UART/USB for systemconfiguration and different data transmission including original images, rectifiedimages, cost value and disparity map, the system can support different application;modular and parametric design make the system easy to be extended for higherresolution and greater matching range.