A Study Of Hybrid Cache Management Mechanism Based On Page Classifier And Page Placer

In current computer architecture, cache is a key technology to mitigate the effect ofprocessor-memory speed gap. With the increasing capacity of cache, cache has more andmore significant impact on the entire chip size, power consumption, performance andoperating efficiency, especially on the CMP chips. Many different memory (Memory)technologies continue to appear, they clearly have different characteristics, such as:density, read and write latency, dynamic/static power consumption, reliability, scalability,and so on. The following are four important memory technologies: SRAM, eDRAM,MRAM and PRAM. Hybrid cache could combine the advances of different technology. Itis a challenge how to manage the hybrid caches.Some prior work has studied hybrid cache management at cache line level which hasrelatively large overhead. We propose and study a scheme of managing hybrid cache at OSpage level through page classification and placement. This management mechanism ismore flexible and has less overhead. We evaluate such type hybrid cache on CMP that thelast level cache was made of disparate memory technology.Utilizing a full-system simulator that has been validated against real hardware, wedemonstrate that hybrid cache management could provide3.74%higher IPC whilecompared with the SRAM cache with same size.