| Efficiency and linearity are important index of power amplifier, but with a certainextent, those are often contradictory. Under the premise of ensuring linearity, toimprove the efficiency has become a hot issue in research filed. Through access to alarge number of documents, this paper presents a variety of methods to improve thepower amplifier efficiency, including Envelope Tracking, Envelope Elimination andRestoration, LINC, Doherty, Harmonic control, Harmonic injection, Tunable MatchingNetwork.Based on the thinking of the Stacked-FET in chip design filed, this paper proposesa new power amplifier architecture in millimeter-wave transmitter. The PAs withStacked-bias architecture has been developed. With the drain supply voltage up to+24V,the PAs delivers41.8dBm saturated power form26GHz to30GHz. The overallefficiency of transmitter in the framework is about11%, compared to nearly threepercentage points higher in the efficiency of the traditional parallel architecture.Considered to transmitter efficiency is generally lower than10%, the new frameworkhas a strong engineering applied value.Doherty technology combined with digital pre-distortion, by virtue of its superiorperformance, has become the mainstream scheme to solve the high efficiency and highlinearity of the base station transmitter. With the use of ADS Momentum and schematicdiagram co-simulation, we presents a Doherty amplifier design worked in the WCDMAuplink band. The PAs achieve power added efficiency of44.7%with6dB output powerback-off range, higher than the corresponding class AB amplifier18percent. |
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