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Neural Network Hardware Implementation Based On Fpga In The Research And Design

Posted on:2013-09-02Degree:MasterType:Thesis
Country:ChinaCandidate:P L LiuFull Text:PDF
GTID:2248330374486195Subject:Communication and information system
Abstract/Summary:PDF Full Text Request
Artificial Neural Networks (ANNs) are parallel computational systems comprised of densely interconnected neurons. ANNs are now being used in signal processing, medicine, control system, business, pattern recognition, speech recognition and much more areas. Generally, these ANNs are implemented by software-based method, but in many cases we need the ANNs computing in real-time, which is the software implementation cannot be achieved. So it is necessary to seek a hardware implementation method to reflecting the neural network inherent parallel processing features and improve the processing speed. The FPGA-based hardware implementation method can not only improve processing speed, but also to save hardware resources.Firstly, introduced the methods and meaning of hardware implementation of ANNs, as well as the typical BP and RBF neural network algorithm. The learning method of the neural network, topology and the activation function were also discussed. The hardware implementation of activation function is one of the most important issues. Sigmoid function is selected as the activation function of BP network, and the Gaussian function as the activation function of RBF network. Use look up table and piecewise nonlinear function approximation method to implement the Sigmoid function on FPGA, and use the CORDIC algorithm of Xilinx IP core to realize Gaussian function on FPGA. Had done the simulation and error analysis, it meets the accuracy requirements of ANNs. Secondly, focus on the FPGA based method of BP and RBF neural network, introduced each module in detail. Finally, through the Verilog HDL hardware description language, using the ModelSim6.1software simulated and verified the designed BP and RBF neural network also synthesized the design by ISE10.1platform of Xilinx. And then done the error analysis and performance evaluation. The errors are between10-2and10-3which meets the accuracy requirements of ANNs. The maximum clock frequency can reach100MHz which can basically achieve the requirements of real-time computing.
Keywords/Search Tags:ANNs, activation function, FPGA, hardware implementation
PDF Full Text Request
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