Research On Runtime Verification Method Based On Multi-core Architecture

Along with the increasing performance of hardware, the size and complexity of the software in embedded systems are becoming increasing huge. Software reliability has become a bottleneck to the development of embedded control systems. Traditional methods in embedded computing systems mostly focus on testing and lack of effective tools and technology supporting the analysis and verification of the running system. Monitor-oriented Runtime Verification (MRV) methods are used to be considered as effectively ways to increase software system reliability. By adding some monitoring facilities to software system, MRV methods can improve the reliability of system effectively. However, in the case of traditional embedded systems, which are based on single-core processor architecture, it may cause great losses of system performance, thus affect the overall system reliability. With the development of the multi-core architecture, high performance computing platforms are produced to satisfy users’ requirement for solving large and complex problems, multi-core architecture has become a new trend in the verication field to improve the performance.In this thesis, multi-core processor architecture which is recently utilized in many embedded computing systems was adopted to do some new preliminary explorations of MRV. Specifically, two kinds of MRV framework based on multi-core architecture are designed and analyzed, including in-line and out-line verification modes, and single-monitor and multi-monitor MRV instances are also designed. Furthermore, in order to check the multi-core MRV methods, several corresponding implementations (developed on the platform of Visual Studio and Eclipse) are provided and applied into several open source projects. The results of experiments show that MRV based on multi-core architecture can improve the performance of run-time verification of the system effectively under different verification modes. Our work gives a foundation for further research of how to design good multi-core MRV methods.