Buried Layer Shallow Groove Structure Device Design

Power semiconductor devices are often used to switch and rectify current, so low on-resistance and short switching time are expected in order to reduce the power loss. The shallow groove buried layer structure is studied in this paper. This structure can be used in the rectifier and the VDMOS, called shallow groove buried layer power rectifiers and shallow groove buried layer power MOSFET respectively. The main contents of this paper are as follows:1. After detailed analysis of theory and derivation of the forward voltage drop’s formulas, a100V shallow groove buried layer power rectifier is designed. After a lot of simulation and optimization, the shallow groove buried layer power rectifier with good performance is obtained:the break voltage is109.8V, leakage current level is1×10-11A/μm, the forward voltage drop is only0.3V(at turn-on point), and the reverse recovery charge is only20nC(with the forward current of10A).Comared to the conventional PN junction power rectifier with the same reverse break voltage, the static and dynamic electrical properties of the shallow groove buried layer power rectifier are respectively improved by57.1%and89.6%. Based on optimization’s results of the device structure’s parameters, the manufactured process case is chosen, process simulation and optimization is done, and the layouts are designed, testing and analysis of devices are executed after tapeout. The best testing results of the device are as follows:the reverse break voltage is120V, the leakage current is1.4μA, and the forward voltage drop is only0.3V (at IF=500mA), the reverse recovery charge is only18nC (with the forward current of10A). Some of the tapeout results are slightly better than the simulation results, mainly due to the adjustment of the P-type buried layer’s implant dose2. Shallow groove buried layer power MOSFET or accumulation-type MOSFET is also studied in this paper. First, the analysis of how it works is conducted:through the accumulation channel to control the device is turned on and off, so a low on-resistance can be obtained with carriers’accumulation in the channel; Then, a30V shallow groove buried layer power MOSFET is designed, the simulation and optimization results show that:with the breakdown voltage larger than30V and breakdown characteristics of the ideal, the specific on-resistance is only8.25mQ· mm2(VGS=5V).